Room 236C in Wisenbaker Building (WEB)
Jinchun Kim – Texas A&M University
Abstract: For decades, the primary tools in alleviating the “Memory Wall” have been large cache hierarchies and data prefetchers. Both approaches, become more challenging in modern, Chip-multiprocessor (CMP) design. Increasing the last-level cache (LLC) size yields diminishing returns on size; given VLSI power scaling trends, this approach becomes hard to justify. These trends also impact hardware budgets for data prefetchers and LLC replacement modules. Moreover, in the context of CMPs running multiple concurrent processes, prefetching and replacement accuracy is critical to prevent cache pollution effects.
In this talk, I will discuss two novel on-chip memory management techniques: Signature Path Prefetching (SPP) and Kill-the-PC (KPC) replacement algorithm. SPP is a data prefetcher that adaptively throttles itself on a per-prefetch stream basis. We compress a series of memory accesses into a small signature and iteratively use the signature until the prefetching confidence falls below a certain threshold. Also, unlike other history based algorithms which miss out on many prefetching opportunities when address patterns make a transition between physical pages, SPP tracks complex patterns across physical page boundaries and continues prefetching as soon as they move to new pages. While SPP is a pure prefetching scheme, KPC bridges the gap between data prefetcher and cache replacement. I’ll discuss how KPC can be used to eliminate the use of program counter and improve the performance of LLC replacement policy.
Bio: Jinchun Kim is a Ph.D. candidate of Electrical and Computer Engineering at Texas A&M University, advised by Dr. Paul V. Gratz. Jinchun’s research interests are in computer architecture with particular emphasis on future memory system design. He has been recognized with two best paper nominations at MICRO 2014 and MICRO 2016. Jinchun is currently on the job market for academic/industry research positions.