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CESG Seminar: Multi-gate FET (MuGFET) Status and Projections for 16nm Node and Beyond

September 7, 2012 @ 3:00 pm - 4:00 pm

Room 1037 Emerging Technology Building (ETB)

Professor H. Rusty Harris/ECEN Dept./TAMU

Abstract

The past decade has seen the FinFET transform from a laboratory project to a fabrication reality. Many technological challenges were accomplished in making the FinFET a feasible option in scaling as we increase packing density and decrease standby power consumption. We will briefly review these accomplishments, look at the important design considerations in implementing FinFETs, and compare them with competing technologies. Finally, we will examine the challenges that remain before FinFETs a full out technology solution.

Bio:  Professor Harris earned his PhD from Texas Tech University, completing research in GaN, high k gate dielectrics and low k passivation dielectrics during his graduate studies. After a brief assistant professorship at University of Missouri he worked for Advanced Micro Devices in gate stack engineering and process integration for the 45nm and 32nm technology nodes. He managed the FinFET research group for 22nm technology node research while assigned at SEMATECH in Austin, TX. He is currently researching nano-sclae devices for energy applications using GaN, and he is involved in Dark Matter Research in the Physics Department.

Details

Date:
September 7, 2012
Time:
3:00 pm - 4:00 pm