Room 1037 Emerging Technology Building (ETB)
Dr. Michael Orshansky/Associate Professor/Univ. of Texas at Austin
Recently there has been increased interest in approximate computing due to its potential to achieve large energy savings. This talk describes our work on enabling low-level approximate computation and development of design principles for energy-optimal approximate (“sloppy”) addition. We identify a fundamental trade-off between error frequency and error magnitude in a timing-starved adder and introduce a formal model to prove that for signal processing applications using a quadratic signal-to-noise ratio error measure, reducing bit-wise error frequency is sub-optimal. Instead, energy-optimal approximate addition requires limiting maximum error magnitude. The remaining approximation error can be reduced by conditional bounding logic for lower significance bits. Conditional bounding may be used to design over- and under-estimating adders as well as a dithering adder that mixes them to produce zero-centered error distributions, and, in accumulation, a reduced-variance error. We also show how the existence of an intrinsic notion of quality floor present in typical digital signal processing circuits can be used to reduce their energy consumption by strategically accepting some runtime errors. Conventional VLSI design strategies do not exploit this degree of error tolerance and aim to guarantee timing correctness, thereby sacrificing energy efficiency. We describe our work on timing-error acceptance which improves the quality-energy tradeoff in image processing systems under scaled supply voltage. The basic philosophy is to prevent signal quality from severe degradation by using data statistics. The introduced innovations include techniques for carefully controlling possible errors and exploiting the specific patterns of errors for low-cost post-processing to minimize image quality degradation.
Michael Orshansky is an Associate Professor of Electrical and Computer Engineering at the University of Texas, Austin. He received his Ph.D. degree in Electrical Engineering and Computer Sciences from the University of California, Berkeley, in 2001. Prior to joining UT Austin, he was a Research Scientist and Lecturer with the Department of EECS at UC Berkeley. His research interests include low-power design, approximate computing, design optimization for robustness and manufacturability, and statistical analysis and design methods. He is the recipient of the National Science Foundation CAREER award for 2004 and ACM SIGDA Outstanding New Faculty Award in 2007. He received the 2004 IEEE Transactions on Semiconductor Manufacturing Best Paper Award, as well as Best Paper Awards at the Design Automation Conference 2005, International Symposium on Quality Electronic Design (ISQED) 2006, and International Conference on Computer-Aided Design (ICCAD) 2006. He is the co-author of the book “Design for Manufacturability and Statistical Design: A Constructive Approach.”