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CESG Seminar: “How Much Time, Energy, and Power Does an Algorithm Need?”

April 7 @ 4:10 am - 5:10 pm

| Free

Richard (Rich) Vuduc of Georgia Tech


Abstract: Given an algorithm and a computer system, can we estimate or bound the amount of physical energy (Joules) or power (Watts) it might require, in the same way that we do for time and storage? These physical measures of performance are relevant to nearly every class of computing device, from embedded mobile systems to power-constrained datacenters and supercomputers. Armed with models of such measures, we can try to answer many interesting questions. For instance, can algorithmic knobs be used to control energy or power as the algorithm runs? How might systems be better balanced in energy or power for certain classes of algorithms? This talk is about general ideas of what such analyses and models might look like, giving both theoretical predictions and early empirical validation of our algorithmic energy and power models on real software and systems.

Bio: Rich Vuduc is an Associate Professor at the Georgia Institute of Technology (“Georgia Tech”), in the School of Computational Science and Engineering, a department devoted to the study of computer-based modeling and simulation of natural and engineered systems. His research lab, the HPC Garage (@hpcgarage), is interested in high-performance computing, with an emphasis on performance analysis and performance engineering. He has received a DARPA Computer Science Study Group grant; an NSF CAREER award; a collaborative Gordon Bell Prize in 2010; Lockheed Martin’s Award for Excellence in Teaching (2013); Best Paper Awards at the SIAM Conference on Data Mining (SDM, 2012) and the IEEE Parallel and Distributed Processing Symposium (IPDPS, 2015) among others. He also served as his department’s Associate Chair and Director of its graduate programs from 2013-2016. External to Georgia Tech, he was elected to be Vice President of the SIAM Activity Group on Supercomputing (2016-2018); co-chaired the Technical Papers Program of the “Supercomputing” (SC) Conference in 2016; and serves as an associate editor of both the International Journal of High-Performance Computing Applications (IJHPCA) and IEEE Transactions on Parallel and Distributed Systems (TPDS). He received his Ph.D. in Computer Science from the University of California, Berkeley, and was a postdoctoral scholar at the Lawrence Livermore National Laboratory.


April 7, 2017
4:10 am - 5:10 pm


WEB, Room 236-C
Wisenbaker Engineering Building
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Nick Duffield