As the computing industry moves to chip-multi-processors (CMPs), scaling performance as core counts increase to the hundreds in future CMPs will require high performance, yet energy-efficient interconnects. Silicon nanophotonics is a promising replacement for electronic on-chip interconnect due to its high bandwidth and low latency, however, the static power needed for the laser and ring thermal tuning can be high. In this talk, I present a novel nanophotonic Network on Chip (NoC) architecture, LumiNOC, optimized for high performance and power-efficient interconnects. This architecture is marked by three main contributions: 1) a novel channel sharing arrangement to interconnect sub-sets of cores into photonic subnets, 2) a distributed and purely photonic arbitration mechanism for managing the shared channels, and 3) the ability to leverage the same wavelengths for channel arbitration and parallel data transmission, allowing efficient utilization of the photonic resources without dedicated arbitration channels or networks which lower efficiency or add latency to the system.
Bio: Mark Browning is a Master’s Student in Computer Engineering at Texas A&M University. He received his B.S. in Nuclear Engineering from Texas A&M University in 2009, but got sidetracked with commercial software development before starting his research into Networks On Chip and Silicon Nanophotonics in 2011.