Since September 2015, I have been a Professor in the Computer Engineering and Systems Group in the Department of Electrical and Computer Engineering at Texas A&M University.

From September 2010, I was an Associate Professor in the Computer Engineering and Systems Group in the Department of Electrical and Computer Engineering at Texas A&M University.

From June 2004, I was an Assistant Professor in the Computer Engineering and Systems Group in the Department of Electrical and Computer Engineering at Texas A&M University.

From January 2000 to June 2004 I was an Assistant Pofessor with the Department of Electrical and Computer Engineering at the University of Colorado at Boulder. I completed my Ph.D. from the University of California, Berkeley in 1999. Before this, I worked with Motorola, Inc on the designs of the MC88110 and PowerPC 603 RISC Microprocessors. Before my work at Motorola, I obtained my M.S from the University of Texas at Austin which followed my B.Tech. from the Indian Institute of Technology, Kanpur.

    • My research areas fall under three broad topics:
    • Intelligent and Secure Computing Systems: In this category, my work falls into two subcategories–Hardware Archictures and Circuits for Machine Intelligence, as well as Secure Computing.
      • In the first sub-area, I am looking into architectures and special circuits to allow orders of magnitude improvements in machine learning performance on hardware. This work leverages my work on computer architecture from the circuits up (including the design of efficient NoCs using a resonant clocking, special function units for comparison, hashing, Boolean Satisfiability and sorting, low energy/power circuits using sub-threshold circuits. My past work on algorithm acceleration (using GPUs, FPGAs and custom ICs) is prominently used in this area.
      • In the second sub-area, I am looking at new techniques to design secure circuits for blockchain applicatins, secure hardware design, physically unclonable functions, efficient realization of cryptocircuits, bottom-up, provable security in hardware and software systems, new security algorithms for hardware and software, as well as multi-factor security protocols with embedded true random number generators
    • Logic and its applications: In this area, my work initially started in the space of logic synthesis for VLSI CAD. In the last couple of years, I have directed this work towards genomics (predictor inference, Gene Regulatory Network (GRN) construction, determining optimal drug regime for a genetic disease), noise based logics and their realization, and Boolean Satisfiability solvers (using noise based logic as well as GPU, FPGA and custom IC based accelerators).
    • Interdisciplinary extensions: The above two areas form a spring-board from which I engage in research in other domains. I explore extensions of the above two areas to other areas such as IP routing (routing table compression, architecture and design of Ternary CAMs), Digital Signal Processing (architectures and designs for FFT, FPGA and GPU based radar signal processors), optical networking (SAT based Routing and Wavelength Assignment for DWDM optical networks), wireless communication (MIMO decoders, WiMAX decoders) and coding (LDPC decoders, fix-free code generators).