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CESG Seminar: Energy-Efficient System Design

September 6, 2013 @ 3:00 pm - 4:00 pm

Room 1034 ETB

Energy efficiency is arguable one of the main concerns in both
high-performance as well as embedded computing today. There are
principally two ways how to reduce energy consumption: reducing the
overhead per computation (specialization) or reducing the amount of
computation that is performed in the first place (approximation). In
this talk, I will present work in both of these areas.

For specialization, we are investigating heterogeneous, domain-specific
processors that can achieve the efficiency and performance of custom
hardware with the flexibility to run a whole class of applications. We
have specifically developed a high-performance, low-power linear algebra
processor (LAP) that can achieve 600 double-precision GFLOPS in 25W (in
45m) while being flexible enough to run the full set of basic linear
algebra subroutines (BLAS). I will also show recent results on extending
this LAP to run large matrix factorizations and FFTs at the same

For approximate computing, I will present work on circuit, logic, RTL
and system level techniques to trade off carefully controlled precision
reductions and logic errors for significant energy gains in digital
signal processing kernels, such as (I)DCTs, filters or FFTs. Results
demonstrate the existence of whole families of Pareto-optimal solutions
in which energy can be reduced by 40-60% while maintaining good output
signal quality. We have started to applied such approximate blocks in
larger communication systems, where precision of is adaptively
controlled to optimize power while maintaining a constant output error
rate under varying input channel conditions.

Bio: Andreas Gerstlauer is an Assistant Professor in Electrical and
Computer Engineering at The University of Texas at Austin. He received
his Ph.D. in Information and Computer Science from the University of
California, Irvine (UCI) in 2004. Prior to joining UT Austin in 2008,
he was an Assistant Researcher in the Center for Embedded Computer
Systems (CECS) at UC Irvine, leading a research group to develop
electronic system-level (ESL) design tools. Dr. Gerstlauer is
co-author on 3 books and more than 60 conference and journal
publications. He serves as an Associated Editor for ACM TECS as well as
on the program committee of conferences such as DAC, DATE, CODES+ISSS
and ICCD. His research interests include system-level design automation,
system modeling, design languages and methodologies, and embedded
hardware and software synthesis.


September 6, 2013
3:00 pm - 4:00 pm