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February 2018

CESG Seminar: “Toward Online Intrusion Tolerance & Response in Power Systems”

February 16 @ 4:10 pm - 5:10 pm
WEB, Room 236-C,
Wisenbaker Engineering Building

Presenter: Dr. Katherine Davis, Assistant Professor in Texas A&M’s Department of Electrical and Computer Engineering   Title: “Toward Online Intrusion Tolerance & Response in Power Systems”   Abstract: The power grid is a vast and interconnected cyber-physical system for delivering electricity.  Treating the grid as a cyber-physical system requires new perspectives, including analysis techniques as well as operating procedures.  Attacks on the grid could detrimentally affect public health and safety, yet its cyber infrastructure is not currently subjected to the intense analysis of its electrical counterparts.  In this talk, we discuss challenges and opportunities for enabling online intrusion tolerance and response in power systems.  The focus is on ensuring effective control under adversarial presence, for which we leverage the interdependencies of distributed controllers.  This talk formalizes the roles that distributed controllers play and quantifies how coordinated loss and compromise impacts the system.  Based on this analysis, we present strategies for maintaining or regaining system control during such an attack.  Analysis of physical interdependencies in formulating online response actions is heightened by considering cyber interdependencies as well.  This talk will also present online control action selection in context of our cyber-physical security assessment (CyPSA) toolset.  CyPSA is an online framework that analyzes and prioritizes operational reliability risks due to threats to the cyber infrastructure.  In moving forward, the encompassed techniques are necessary in providing cyber-resilience to power grid and other cyber-physical critical infrastructures.   Biography: Katherine Davis is an Assistant Professor in the Department of Electrical and Computer Engineering at Texas A&M University (TAMU).  Previously, Dr. Davis was a Research Scientist with the Information Trust Institute and Adjunct Assistant Professor in the Department of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign.  She founded kaedago, Inc. to provide cyber-physical situational awareness to utilities and worked as a Software Engineer and Senior Consultant for PowerWorld Corporation. She received her M.S. and Ph.D. degrees in Electrical and Computer Engineering from University of Illinois at Urbana-Champaign and B.S. degree from The University of Texas at Austin.  Her interests include data-enhanced power system modeling and analysis, security-oriented cyber-physical techniques to defend electrical and cyber infrastructures, and making algorithms more robust with respect to untrustworthy inputs.  Dr. Davis is a member of IEEE PES, IEEE COMSOC, ASEE, HKN, and Tau Beta Pi.

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CESG Seminar: “Impact of the Cyber-Physical Interdependency on Cascading Failure Mitigation in the Smart Grid”

February 9 @ 4:10 pm - 5:10 pm
WEB, Room 236-C,
Wisenbaker Engineering Building

Presenter: Dr. Mingkui Wei, Assistant Professor in the Computer Science Department at Sam Houston State University   Title: “Impact of the Cyber-Physical Interdependency on Cascading Failure Mitigation in the Smart Grid”   Abstract:  The modern smart grid features the integration of advanced communication networks with conventional power grids. The interaction and interdependency between the cyber and physical system drastically change the way power grids operate. On the one hand, assisted by real-time monitoring and control, the smart grid becomes more robust and resilient against ordinary failures. On the other hand, failures occurred in one domain can be transferred to, and even exacerbated by, the counterpart system in another domain, which inevitably cause the smart grid to become more fragile to severe incidences such as cascading failures. Before fully embracing the smart grid as a new technology, it is essential to understand thoroughly the impact exposed by such cyber-physical interdependency from both the positive and negative perspective. In this seminar, Dr. Mingkui Wei will present his latest work in modeling and evaluating the impact of cyber-physical interdependencies on cascading failure mitigation in the smart gird. His work identifies interesting phase-transitions where the cyber-physical interdependency first assists and then hinders the cascading failure mitigation process. Biography: Dr. Mingkui Wei is an Assistant Professor in the Computer Science Department at Sam Houston State University. He graduated from North Carolina State University with a Ph.D. in Computer Engineering. His current research interests lie in modeling and evaluating the robustness, resilience, and security of cyber-physical systems from the perspective of communication networks. His research has been published and referenced at multiple top-tier international conferences and transactions. Free Snacks!

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CESG Fishbowl Seminar: “Modern System Design – the entangled Compute, Communication, and Cloud”

February 8 @ 2:30 pm - 3:30 pm

Presenter: Dr. Priyadarsan (Darshan) Patra, Chief Architect at Intel’s Data Center Group   Title: “Modern System Design – the entangled Compute, Communication, and Cloud”   Abstract: In this seminar talk, we will discuss the motivations, the drivers and the problems of modern hardware system design when considering the full stack – Compute, Communication and Cloud. We will examine the technology outlook, peering into a not-so-distant future, and the ‘technology dividends’ as well, while also analyzing some of the implications, the scaling challenges and some solution approaches. In the latter part, we will explore the connection of industrial system architecture & design to its validation & debug, and what the various associated disciplines entail.   Biography: Dr. Priyadarsan (Darshan) Patra serves as Chief Architect (System Validation) at Intel’s Data Center Group.  He has had ~23 years at Intel creating and leading world-class research and development for Server, SoC and Client processors/devices (e.g. P6, Nehalem, Wesmere, Haswell, Broadwell, Valleyview, Broxton, Skylake, Base station APU, smartNIC) involving Design, Validation, Debug & Test.  His leadership and experience at Strategic CAD Labs, Microprocessor Technology Labs, Intel Architecture Group and Networking Platforms Group spanned these areas:  Architecture for Validation & Debug; HVM Functional-Test; Low-power design and systems; Strategic Co-optimized software, firmware & hardware system validation; high-perf and low-power circuits (CAD); Algorithms and non-linear optimization, Technical management & strategic planning. He led the definition and end-to-end implementations of technologies such as DCI/EXI, VCU, probeless PSMI that appear in multiple generations and families of Intel silicon. He has authored a dozen patents & inventions, 50+ peer-reviewed papers, and 2 books in technical fields.  He has directly mentored technical work of over a dozen graduate students and many professors through the years. Darshan is an elected Senior Member of both the IEEE and the ACM and has held several leadership positions in the technical community. He has been recognized with several awards including Intel Hero (US) and Intel Trail Blazer Awards. He serves as the Founding Chair of the IEEE-CEDA System Validation and Debug Technology Committee (SVDTC), and as the Steering Committee Chair of the Int’l Symposium on Embedded Computing & System Design. Passionate about social development and volunteerism, he has founded the Sustainable Economic and Educational Development Society. He holds a Ph.D. from the Univ. of Texas at Austin. Light snacks served

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“Accurate Learning or Fast Mixing? Dynamic Adaptability of Caching Algorithms”

February 2 @ 11:30 am - 12:30 pm
WEB, Room 236-C,
Wisenbaker Engineering Building

Srinivas Shakkottai Associate Professor, Texas A&M University Presentation: “Accurate Learning or Fast Mixing? Dynamic Adaptability of Caching Algorithms” Abstract: Typical analysis of content caching algorithms using the metric of hit probability under a stationary request process does not account for performance loss under a variable request arrival process. In this work, we consider adaptability of caching algorithms from two perspectives: (a) the accuracy of learning a fixed popularity distribution; and (b) the speed of learning items’ popularity. In order to attain this goal, we compute the distance between the stationary distributions of several popular algorithms with that of a genie-aided algorithm that has knowledge of the true popularity ranking, which we use as a measure of learning accuracy. We then characterize the mixing time of each algorithm, i.e., the time needed to attain the stationary distribution, which we use as a measure of learning efficiency. We merge both measures above to obtain the “learning error” representing both how quickly and how accurately an algorithm learns the optimal caching distribution, and use this to determine the trade-off between these two objectives of many popular caching algorithms. Informed by the results of our analysis, we propose a novel hybrid algorithm, Adaptive-LRU (A-LRU), that learns both faster and better the changes in the popularity. We show numerically that it also outperforms all other candidate algorithms when confronted with either a dynamically changing synthetic request process or using real world traces.   Biography: Srinivas Shakkottai received a PhD (2007) in Electrical Engineering, from the University of Illinois at Urbana-Champaign.  He was a post-doctoral scholar in Management Science and Engineering at Stanford University in 2007, and is currently an associate professor at the Dept. of ECE at Texas A&M University. His research interests include content distribution systems, economics of network resource allocation, game theory, wireless networks, and Internet data analytics. Srinivas is the recipient of the Defense Threat Reduction Agency Young Investigator Award (2009) and the NSF Career Award (2012), as well as research awards from Cisco (2008) and Google (2010).  He also received The Dept. of ECE Outstanding Professor Award (2013) and was selected as a TEES (College of Engineering) Select Young Faculty Fellow (2014) at Texas A&M University.  

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January 2018

CESG Seminar: “Private Information Retrieval with Side Information”

January 26 @ 4:10 pm - 5:10 pm
WEB, Room 236-C,
Wisenbaker Engineering Building
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Brenden Garcia Texas A&M University, Computer Engineering Abstract: We will focus on the problem of Private Information Retrieval (PIR) where there is a database of messages that is replicated across multiple servers and a user needs to retrieve one of the messages in the database. The objective of the PIR problem is to enable the user to retrieve the desired message without revealing its identity to any of the servers while minimizing the amount of data downloaded from the servers. We begin by presenting a brief body of work on the PIR problem. Next, we will discuss a variation of the PIR problem in which the user has access to some prior side information about the database in the form of a subset of messages contained in the database. This scenario is motivated by practical settings where the user has downloaded the messages from other sources or has downloaded the messages privately from the servers using a known PIR scheme.  We show that the download costs can be reduced when the user is allowed to utilize their side information, show that the optimal download cost can be found, and describe schemes that meet this optimal download cost. Bio: Brenden Garcia is currently pursuing a Master’s degree in Computer Engineering at Texas A&M. His current research interests include Private Information Retrieval and Network Security. He obtained his undergraduate degree in Computer Engineering and Applied Mathematical Sciences from Texas A&M. He is a recipient of the Office of Graduate and Professional Studies Diversity Fellowship award.

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ECEN: “Some thoughts on graduate studies, research, and life thereafter”

January 25 @ 4:00 pm - 5:00 pm

Dr. P.R. Kumar Professor and College of Engineering Chair in Computer Engineering Texas A&M University   Abstract: Graduate students are faced with many questions. How should one choose courses? How does one arrive at a topic for the dissertation? How can I obtain new results? Should I apply for an academic job, or industry job, or startup? And there are many other such matters on which graduate students need to make choices. I will present my thoughts on these issues, and aim to engage in an open-ended discussion with the audience. Biography: Dr. P. R. Kumar’s current focus includes cyberphysical systems, cybersecurity, privacy, wireless networks, smart grid, autonomous vehicles, and unmanned air vehicle systems. His research interests include control theory, information theory, stochastic systems, machine learning, and operations research. He obtained a B.Tech. from IIT Madras, and D.Sc. from Washington University, St. Louis, in 1973 and 1977, respectively. He previously served on the faculty of Department of Mathematics, University of Maryland Baltimore County, and is Franklin Woeltge Professor Emeritus, University of Illinois, Urbana-Champaign. He is a member of the U.S. National Academy of Engineering, The World Academy of Sciences, and the Indian National Academy of Engineering. He was awarded an honorary doctorate by ETH, Zurich. He has received the IEEE Field Award for Control Systems, the Donald Eckman Award of American Automatic Control Council, the Fred Ellersick Prize of IEEE Communications Society, the Outstanding Contribution Award of ACM SIGMOBILE, the Infocom Achievement Award, and a SIGMOBILE Test-of-Time Paper Award. He is a Fellow of IEEE and ACM Fellow. He was Leader of the Guest Chair Professor Group on Wireless Communication and Networking at Tsinghua University. He is a Gandhi Distinguished Visiting Professor at IIT Bombay, and Honorary Professor at IIT Hyderabad. He was awarded the Distinguished Alumnus Award from IIT Madras, the Alumni Achievement Award from Washington University in St. Louis, and the Daniel Drucker Eminent Faculty Award from College of Engineering, University of Illinois.

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December 20172017
Free

SPECIAL CESG SEMINAR: Three CESG Grad Students Present! – Abbas Fairouz

December 1, 2017 @ 4:10 pm - 5:10 pm
WEB, Room 236-C,
Wisenbaker Engineering Building

“A Novel Hardware Hash Unit Design for use in Modern Microprocessors” Abstract: Historically, microprocessor instructions were designed in order to obtain high performance on integer and floating point computations. Today’s applications, however, demand high performance for cloud computing, web-based search engines, network applications, and social media tasks. Such software applications involve an extensive use of hashing in their computation. Hashing can reduce the complexity of search and lookup from O(n) to O(n/k), where k bins are used. In modern microprocessors, hashing is done in software. In this work, we propose a novel hardware hash unit design for use in modern microprocessors. We present the design of the Hash Unit (HU) at the micro-architecture level. We simulate the new HU to compare its performance with a software-based hash implementation. We demonstrate a significant speed-up (up to 13x) for the HU. Furthermore, the performance scales elegantly with increasing database size and application diversity, without increasing the hardware cost. Biography: Abbas Fairouz is a PhD candidate in the department of ECE at Texas A&M University. He received his BS and MS degrees in Computer Engineering from Kuwait University in 2006 and 2011, respectively. He worked at Ministry of Electricity & Water in Kuwait as a system engineer from 2006 till 2014. He worked as a part-time faculty member in the Higher Institute of Telecommunication and Navigation at PAAET in Kuwait from 2008 to 2010. His research of interests are in VLSI design, Low-Power circuit design, Computer Microarchitecture design, design of SFUs in modern microprocessors and coprocessor acceleration units using FPGAs.

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Free

SPECIAL CESG SEMINAR: Three CESG Grad Students Present! – Vamseedhar Reddyvari

December 1, 2017 @ 4:10 pm - 5:10 pm
WEB, Room 236-C,
Wisenbaker Engineering Building

“Mode-Suppression: A Simple and Provably Stable Chunk-Sharing Algorithm for P2P Networks” Abstract: The ability of a P2P network to scale its throughput up in proportion to the arrival rate of peers has recently been shown to be crucially dependent on the chunk sharing policy employed. Some policies can result in low frequencies of a particular chunk, known as the missing chunk syndrome, which can dramatically reduce throughput and lead to instability of the system. For instance, commonly used policies that nominally “boost” the sharing of infrequent chunks such as the well-known rarest-first algorithm have been shown to be unstable. Recent efforts have largely focused on the careful design of boosting policies to mitigate this issue.  We take a complementary viewpoint, and instead consider a policy that simply prevents the sharing of the most frequent chunk(s). Following terminology from statistics wherein the most frequent value in a data set is called the mode, we refer to this policy as mode suppression. We prove the stability of this algorithm using Lyapunov techniques. We also design a distributed version that suppresses the mode via an estimate obtained by sampling three randomly selected peers. We show numerically that both algorithms perform well at minimizing total download times with distributed mode suppression outperforming all others that we tested against. Biography: Vamseedhar Reddyvari is a PhD student in Electrical & Computer Engineering at Texas A&M University. He got his bachelor’s from IIT Bombay and master’s from IIT Kanpur both in Electrical Engineering. His area of interests are in Networking, Game Theory and Stochastic Learning.

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Free

SPECIAL CESG SEMINAR: Three CESG Graduate Students Present! – Yingyezhe Jin

December 1, 2017 @ 4:10 am - 5:10 pm
WEB, Room 236-C,
Wisenbaker Engineering Building

“Calcium-Modulated Supervised Spike-Timing-Dependent Plasticity for Readout Training and Sparsification of the Liquid State Machine” Abstract: The Liquid State Machine (LSM) is a promising model of recurrent spiking neural networks. It consists of a fixed recurrent network, or the reservoir,  which  projects to a readout layer through plastic readout synapses. The classification performance is highly dependent on the training of readout synapses which tend to be very dense and contribute significantly to the overall network complexity. We present a unifying biologically inspired calcium-modulated supervised spike-timing-dependent plasticity (STDP) approach to training and sparsification of readout synapses, where  supervised temporal learning is modulated  by the post-synaptic firing level characterized by the post-synaptic calcium concentration. The proposed approach prevents synaptic weight saturation, boosts learning performance,  and sparsifies the connectivity between the reservoir and readout layer.  Using the recognition rate of spoken English letters adopted from the TI46 speech corpus as a measure of performance, we demonstrate that the proposed approach outperforms a baseline supervised STDP mechanism by up to 25%, and a competitive non-STDP spike-dependent training algorithm by up to 2.7%. Furthermore, it can prune out up to 30% of readout synapses without causing significant performance degradation. Biography: Yingyezhe Jin is a fifth year Ph.D. candidate in the Department of Electrical and Computer Engineering, Texas A&M University. His current research interests include machine learning and training algorithms for spiking neuron networks. He received a B.S. degree in Electronic and Information Engineering from Zhejiang University, Hangzhou, China, in 2013. 

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November 2017
Free

CESG Fishbowl Seminar: “Optimization and Verification in the Billion-Transistor World” – Dr. Min Zhao

November 30, 2017 @ 2:30 pm - 3:30 pm

Dr. Min Zhao Avatar Integrated Systems   Abstract: After decades of technology scaling, high-end chip products often contain billions of transistors. Optimizing and verifying resource utilization in the billion-transistor world present a huge challenge. This talk will use on-chip power grid as an example to demonstrate the difficulties and innovative solutions for industrial products under this challenge. Specifically, this talk will describe techniques about on-chip power grid analysis, power pad placement, decoupling capacitance allocation, and late-stage power wire addition. In addition, a couple of other back-end optimization and verification techniques will be briefly discussed. Finally, plans on future research and applications of industrial experience to education will be presented.   Biography: Min Zhao received her B.S. and M.S. degrees in Computer Engineering in China in 1993 and 1996, respectively. She was a lecturer at Dalian Maritime University, China in 1996. She received her Ph.D. in Electrical Engineering from the University of Minnesota in 1999. In 1999-2007, she was with Freescale (formerly Motorola Semiconductor) where she contributed to the first generation industrial on-chip power network analysis tool, PEEC-model inductance extraction and clock network analysis tool. In 2007-2010, she worked at Magma Design Automation, where she was the main developer of the S-parameters and statistical features of Magma’s flagship tool on circuit simulation. She was a principal engineer at Oracle from 2010 to 2017, where she developed several new back-end tools widely used in Oracle’s 3.6 – 5GHz SPARC processors. She published 29 technical papers in top EDA conferences and journals, and received 3 patents. She served in the technical program committees of IEEE International Symposium on Quality Electronic Design and IEEE International Conference on VLSI Design.  

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