I lead the CAMSIN research group, where our computer architecture research focuses on power, reliability and performance of the future chip-multiprocessor (CMP) and multiprocessor system-on-chip (MPSoC) designs.
I am a co-PI in the Center for Research in Intelligent Storage at Texas A&M University (CRIS-TAMU), an NSF-funded, Industry/University Cooperative Research (I/UCRC) Program. This is an inter-disciplinary, multi-university, center that brings together researchers under an umbrella to work on cutting-edge research on nonvolatile memories (NVMs), SSDs, memory-storage hierarchies, systems software for NVM, and coding for new memories.
I received my PhD in Electrical and Computer Engineering from the University of Texas at Austin, December 2008. On the TRIPS prototype processor project, I designed, implemented and verified the second level memory system, on-chip network and chip-to-chip network.