CESG Seminar: Wantong Li

Friday, January 26, 2024
10:20 a.m. – 11:10 a.m. (CST)
ETB 1020

Wantong Li
PhD Candidate, School of Electrical and Computer Engineering
Georgia Institute of Technology

Title: “Efficient, Robust, and Heterogeneous Compute-in-Memory for Edge Intelligence”

Abstract
Deep neural networks (DNNs) have provided remarkable performance gains in fields spanning computer vision and natural language processing. The increasingly heavier workloads to run DNN models have attracted interdisciplinary efforts to speed up DNN inference, and many of such efforts focus on accelerating the dominant multiply-and-accumulate (MAC) operations. On the hardware front, the disruptive paradigm of compute-in-memory (CIM) aims to process data directly inside memory arrays. Complex arithmetic operations such as MAC can be performed using compute-capable CIM arrays to achieve massive parallelism and unprecedented energy efficiency.

This talk focuses on the IC design and hardware architecture aspects of CIM for executing DNN workloads. The talk first presents a mixed-signal CIM engine that performs parallelized MAC operations inside resistive random-access memory (RRAM) arrays. The RRAM-based CIM chip, fabricated in TSMC 40-nm node, is equipped with circuit designs that ensure PVT-robust operations across a wide spectrum of operating conditions. Next, the unique opportunities to transform computing inside a heterogeneous 3-D (H3D) stack are discussed. An H3D CIM accelerator targeting vision transformer models is shown to gain form factor and energy efficiency enhancements. Finally, low-power portable ultrasound imaging is presented to showcase how CIM can benefit embedded electronics. Through data volume reduction of the ultrasound frontend and a local CIM-based reconstruction accelerator, significant power savings can be achieved for the portable imaging device.

Biography
Wantong Li is a Ph.D. candidate in electrical and computer engineering at the Georgia Institute of Technology. He received a BSEE degree from Washington University in St. Louis in 2015 and a MSEE degree from Columbia University in 2016. From 2017 to 2019, he worked as an IC Design Engineer at Power Integrations. He also held internship positions at AMD, MediaTek, and Roche Diagnostics. He is the recipient of the Georgia Tech ECE INSPIRE Fellowship in 2023. His research centers on memory-centric computing platforms, spanning areas of efficient and robust IC design, heterogeneous 3-D integrated systems, and domain-specific architecture.