Vickie Winston

Friday, Nov. 14, 2025
10:20 – 11:10 a.m. in ETB 1020

Gabe Dagani
Director of GPU Software
Samsung Austin Research Center

Title: “3D Rendering on the Edge: Developing Mobile GPUs for the Samsung Galaxy Phone”

Abstract:
A modern mobile phone puts the power of a game console in your pocket. This talk will review modern 3D rendering, and the challenges of making a flagship mobile phone like the Galaxy Flip7. No prior knowledge of 3D graphics is necessary.

Biography:
Gabe Dagani is a Director of GPU Software at Samsung Austin Research Center. He has over 20 years’ experience in 3D Graphics, video games, and embedded systems. His team is responsible for developing the software stack that goes into millions of phones every year to support all graphics rendering on Samsung Galaxy phones.

Friday, Sept. 26, 2025
10:20 – 11:10 a.m. in ETB 1020

Dr. Saurabh Bagchi
School of Electrical & Computer Engineering
Dept. of Computer Science
Purdue University

Title: “Dependability and Data Analytics: A Grand Challenge of Our Times”

Abstract:
We live in a data-driven world as we have been realizing for some time. Everything is generating data, in volumes and at high rates, from the sensors embedded in our physical spaces to the large number of machines in data centers being monitored for a variety of metrics. The question that I pose in this talk is:

     Can all this data be used for improving the dependability of our computing systems?

Dependability is the property that a computing system continues to provide its functionality despite the introduction of faults, either accidental faults (design defects, environmental effects, etc.) or maliciously introduced faults (security attacks, external or internal). We have been addressing the dependability challenge through large-scale data analytics applied end-to-end from the small (networked embedded systems, mobile and wearable devices) [e.g., MobiSys-25, Security & Privacy-24, CVPR-24, 23, 22, TODAES-23, Eurosys-22] to the large (edge and cloud systems, distributed machine learning clusters) [e.g., NeurIPS-25, 22, UAI-25, CCS-24, Security & Privacy-24, ICLR-24, Middleware-23, OSDI-22, Sigmetrics-22]. In this talk, I will first give a high-level view of how data analytics has been brought to bear on dependability challenges, and key insights and achievements from our technical community. Then I will provide details of three projects where we design systems from the small to the large, to meet dependability and performance requirements, using data-driven decisions.

For the detailed part, I will discuss the following projects: (I) Small: Streaming LiDAR analytics on autonomous vehicles; (II) Small-to-Medium: Sensor-edge-cloud continuum; (III) Small-to-Medium: Secure decentralized learning. I will provide enough background and intuition in each, so that the talk is accessible to a broad CS audience.

Biography:
Saurabh Bagchi is a professor in the School of Electrical and Computer Engineering and the Department of Computer Science at Purdue University in West Lafayette, Indiana. His research interest is in dependable computing and distributed systems. He is the Director of the NSF CISE Center Chorus (2024-ongoing) and of the Army’s Artificial Intelligence Innovation Institute (A2I2) (2020-ongoing). He was selected to the International Federation for Information Processing (IFIP) (2020) and is a Fellow of the Institute of Engineering and Technology (IET) (2022). Saurabh serves on the Board of Governors of the IEEE Computer Society and is the Founder of a cloud computing startup, KeyByte.

Saurabh is proudest of the 25 PhD students and 50 Masters thesis students who have graduated from his research group and who are in various stages of building wonderful careers in industry or academia. In his group, he and his students have way too much fun building and breaking real systems. Along the way, this has led to 13 best paper awards or runners-up awards at IEEE/ACM conferences and a Test of Time Award. Saurabh received his MS and PhD degrees from the University of Illinois at Urbana-Champaign and his BS degree from the Indian Institute of Technology Kharagpur, all in Computer Science.

Dr. Saurabh Bagchi’s homepage is https://www.saurabhbagchi.us.

Friday, Sept. 5 2025
10:20 – 11:10 a.m. in ETB 1020

Fabia Farlin Athena
Energy Postdoctoral Fellow in Electrical Engineering
Stanford University

Title: “Emerging Materials and Devices for Energy-Efficient Nanoelectronics”

Abstract:
The rapid rise of data-intensive workloads, driven by artificial intelligence, is exposing the fundamental energy and latency limits of conventional computing hardware. The memory wall bottleneck, in particular, demands a shift toward new hardware architectures designed to minimize costly data movement. In this seminar, I will present advances at the intersection of materials science and device engineering that address this challenge. First, I will discuss adaptive oxide-based resistive memories for in-memory computing, detailing how novel MAX-phase electrodes achieve record-low off-state currents and how an in-situ recovery method enables robust transfer learning on analog AI accelerators. Next, I will introduce complementary back-end-of-line technologies that advance scalability for high-density, on-chip memory, including oxide semiconductor gain-cells and an interface-dipole engineering strategy for precise threshold voltage tuning. Together, these results highlight a practical and scalable path toward vertically integrated, energy-efficient electronics for future data-centric applications.

Biography
Dr. Fabia Farlin Athena is an Energy Postdoctoral Fellow in Electrical Engineering at Stanford University, working with Prof. H.-S. Philip Wong and Prof. Alberto Salleo to develop high-bandwidth oxide-semiconductor gain-cell memories and monolithic 3-D memory/logic stacks for ultra-low-power AI systems. She earned her Ph.D. and M.S. in Electrical & Computer Engineering from Georgia Institute of Technology, advised by Prof. Eric M. Vogel, where her research focused on adaptive oxide memristors for brain-inspired AI, receiving the Sigma Xi Best Ph.D. Thesis Award. She has also held research scientist intern positions at IBM TJ Watson. Fabia’s interdisciplinary contributions have been recognized with the IBM PhD Fellowship, MRS Graduate Student Award, Cadence Technology Scholarship, VLSI Symposium Highlight Paper, EECS Rising Stars, Stanford Energy Postdoctoral Fellowship, and Forbes 30 Under 30 North America.

Dr. Athena’s Homepage: https://ffathena.github.io/

Friday, April 11, 2025
10:20 – 11:10 a.m.  (CST)
ETB 1020

Dr. Kaushik Chowdhury 
Chandra Family Endowed Distinguished Professor
Dept. of Electrical Engineering & Computer Engineering
The University of Texas, Austin

Title: “Programming the Network and the Environment for Sensing, Communication and Computation”

Abstract:
This presentation delves into how extreme reconfigurability will shape future wireless networks, made possible by exciting new developments in the areas of open radio access networks (O-RAN) and reconfigurable intelligent surfaces (RIS). By embracing programmability at all levels, from centralized cellular architectures to distributed network components, such wireless networks will not only establish resilient communication links but also perform sensing tasks to better perceive and, to an extent, even engineer the surrounding environment. In this two-part talk, we first describe how “programmable networks” in the form of O-RAN-compliant base stations can evolve their roles from sensing weak radar signals to performing automated network traffic analysis followed by resource allocation. In the second part of the talk, we shift towards “programmable environments” where we experimentally demonstrate how custom-designed RIS can be used for channel hardening in single antenna receivers by intentionally creating multipath diversity. We also explore how such programmability opens a new domain of wireless computing, where transmitted signals can be used to perform mathematical operations by leveraging the physics of over-the-air propagation. A common theme in programming both the “network” and “environment” is rigorous experimental validation on laboratory and field-deployed systems.

Biography
Kaushik Chowdhury is a Chandra Family Endowed Distinguished Professor in the Department of Electrical & Computer Engineering at The University of Texas at Austin. His primary interest lies in the areas of applied machine learning for wireless, including signals intelligence, spectrum monitoring and sharing in commercial and dual-use environments, dataset generation, and network optimization by harnessing big data. Prof. Chowdhury has worked on several large-scale wireless community infrastructure projects that include the Colosseum RF/network emulator as well as the Platforms for Advanced Wireless Research project office. Prof. Chowdhury was a finalist for the 2023 US Blavatnik National Awards for Young Scientists. He was also the winner of the U.S. Presidential Early Career Award for Scientists and Engineers (PECASE) in 2017, the Defense Advanced Research Projects Agency Young Faculty Award in 2017, the Office of Naval Research Director of Research Early Career Award in 2016, and the National Science Foundation (NSF) CAREER award in 2015. He is an IEEE Fellow and ACM Distinguished Member.

Friday, March 21, 2025
10:20 – 11:10 a.m.  (CST)
ETB 1020           

Xiongye Xiao
PhD Candidate , Dept. of Electrical & Computer Engineering
University of Southern California

Title: “AI for Science: From Microscopic Structures and Dynamics to Macroscopic Functions”

Abstract
The evolution of scientific discovery has transitioned from observational studies and mathematical modeling to data-driven AI methodologies. With the rapid advancement of deep learning and neural network architectures, AI has become a powerful tool for accelerating scientific discovery. However, as large-scale models exhibit emergent behaviors, understanding the structural and dynamic principles that govern these models is crucial.

In this talk, I will discuss Neuron-based Multifractal Analysis (NeuroMFA), a novel framework that bridges AI and scientific discovery by characterizing the self-organization of large models. Inspired by neuroscience, NeuroMFA provides a structural perspective on emergent intelligence in AI, offering insights into how deep neural networks develop complex functionalities. This approach enables a deeper understanding of AI’s role in science and facilitates advancements in areas such as material discovery, physics-informed machine learning, and computational neuroscience.

Biography
Xiongye Xiao is a researcher specializing in AI for Science, neural operators, and network science. He is a Ph.D. candidate in Electrical and Computer Engineering at the University of Southern California. His work focuses on developing advanced mathematical and machine learning frameworks to bridge microscopic structures and dynamics to macroscopic functions, with applications in neuroscience, material science, and AI-driven scientific discovery. He has published in leading venues such as NeurIPS, ICLR, and Science Robotics, and his contributions include pioneering Neuron-based Multifractal Analysis (NeuroMFA) for analyzing emergent intelligence in large models, as well as the Multiwavelet Neural Operator, which enhances PDE learning through multi-resolution representations.

Please join us on Friday, 3/21/25 at 10:20 a.m. in ETB 1020!

Xiongye Xiao’s Webpage: xiongyexiao.com
Google Scholar Page: https://scholar.google.com/citations?user=AvIxA64AAAAJ&hl=en&oi=ao

Host: Dr. Jiang Hu

Friday, March 7, 2025
10:20 – 11:10 a.m.  (CST)
ETB 1020           

Cunxi Yu
Assistant Professor, Dept. of Electrical & Computer Engineering
University of Maryland, College Park

Title: “The Rise and Fall of Machine Learning for EDA and Beyond – Studies in Synthesis and Verification”

Abstract
In recent years, Machine Learning (ML) has gained considerable momentum in electronic design automation (EDA). Specifically, the successes of ML-driven EDA methods and infrastructure have demonstrated its unique capability in capturing the multitude of factors affecting estimation accuracy, effectively exploring large algorithmic and design spaces in synthesis, and accelerating classical combinatorial optimization problems. In particular, synthesis and verification, critical stages in EDA, have significantly benefited from ML in the last five years. However, during the development of ML-driven synthesis and verification approaches, several points of convergence have been observed, including practicality, system engineering challenges, data availability, and determinism. In this talk, I will present the journey of exploring ML in synthesis and verification, focusing on discussing the evolutionary developments from static ML-based synthesis approaches to algorithmic learning and general combinatorial optimizations using advanced domain-specific ML techniques. The talk will primarily focus on our recent work in high-level synthesis, logic synthesis, and Boolean reasoning.

Biography
Dr. Cunxi Yu is an Assistant Professor at the University of Maryland, College Park. His research interests center around novel algorithms, systems, and hardware designs for computing and security. Before joining the University of Maryland, Cunxi was an Assistant Professor at the University of Utah and held a PostDoc position at Cornell University. His work has received the Best Paper Award at DAC (2023), the NSF CAREER Award (2021), American Physical Society DLS poster award (2022), and multiple best paper nominations. Cunxi earned his Ph.D. from UMass Amherst in 2017.

Please join us on Friday, 3/7/25 at 10:20 a.m. in ETB 1020!

Dr. Yu’s personal webpage and Google Scholar pages are linked from here: https://ece.umd.edu/clark/faculty/1834/Cunxi-Yu

Host: Dr. Jiang Hu

Friday, Feb. 21, 2025
10:20 – 11:10 a.m.  (CST)
ETB 1020           

Yu Wang
PhD Candidate, Dept. of Computer Engineering
University of California, Santa Barbara

Title: “Enable Efficient Bayesian Optimization with Semi-Supervised Learning and In-Context Learning of Large Language Models”

Abstract
Bayesian Optimization (BO) is a powerful framework for optimizing expensive black-box functions, but its efficiency is often hindered by two key challenges: (1) difficulties in encoding domain knowledge and (2) data scarcity that limits surrogate model generalization. In this talk, I will present the recent efforts from our group to address these challenges.

First, we introduce ADO-LLM, which leverages the domain priors of Large Language Models (LLMs) to assist BO in tackling the challenging analog circuit sizing problem. By proposing feasible and high-potential design parameters, LLMs enable BO to efficiently explore design spaces while balancing complex tradeoffs between design specifications.

Second, we discuss TSBO, a method that enhances BO’s data efficiency in high-dimensional settings by strategically incorporating unlabeled samples and generating reliable pseudo-labels via a teacher-student model with feedback. TSBO demonstrates strong performance across multiple high-dimensional BO tasks, achieving up to a 364.2x reduction in labeled data usage.

Finally, I will conclude with a discussion on the broader implications and future directions for data-efficient BO.

Biography
Yu Wang is a Ph.D. candidate in Computer Engineering at the University of California, Santa Barbara, advised by Professor Peng Li. He received his M.S. from Texas A&M University in 2019 and his B.S. from Fudan University.

Yu’s research focuses on the intersection of advanced machine learning and hardware system design, with an emphasis on Bayesian Optimization, Semi-Supervised Learning, and hallucination mitigation in Large Language Models (LLMs). He explores their applications in electronic design automation (EDA) to enhance design efficiency and automation.

His works have been recognized at leading machine learning and circuit design venues, including AAAI, ICML, TMLR, and ICCAD. He also received the Best Paper Award at ASAP 2020.

Please join us on Friday, 02/21/25 at 10:20 a.m. in ETB 1020 to learn more on the research presented by CESG’s former M.S. ECE graduate Yu Wang!

Host: Alex Sprintson; Faculty may request a Zoom Link for this presentation.

Wang’s Google Scholar: https://scholar.google.com/citations?user=lUd8s0QAAAAJ&hl=en

Friday, Feb. 28, 2025
10:20 – 11:10 a.m.  (CST)
ETB 1020           

Dr. Yiorgos Makris
Professor, Dept. of Electrical and Computer Engineering
University of Texas, Austin

Title: “Provenance Attestation: From Silicon Chips to Biological Cells and Beyond”

Abstract
Complex processes, whether natural or artificial, often exhibit inherent variability and result in slightly different products even when identical steps, equipment, materials and conditions are employed. Such variability typically consists of a random component, which is attributed to the endogenous stochasticity of the process itself, and a systematic component, which is attributed to the exogenous aspects of the production. In this presentation, we will discuss how this variability can be harnessed for the purpose of attesting both the process and each copy of the product, thereby facilitating trust, traceability and intellectual property protection. First, in the context of semiconductor manufacturing, using both physical and electrical measurements (a.k.a., metrology and wafer acceptance tests, respectively) from wafers manufactured using multiple copies of a mask-set in a 12nm GlobalFoundries technology, we will demonstrate the use of contemporary statistical and machine learning-based methods for determining whether a wafer was produced by a ratified mask-set. Leveraging the insight gained through this analysis, we will also discuss the design of custom sensors for obtaining the relevant information from each die on a wafer to collectively attest the mask-set used to produce this wafer, without relying on potentially untrusted foundry-provided data. Then, in the context of synthetic biology, using amplicon sequencing data from multiple cell lines (i.e., HEK293, HCT116 and HeLa), we will demonstrate that the stochasticity of the non-homologous end-joining (NHEJ) DNA repair process can be leveraged as a mechanism for introducing a unique identifier (i.e., a Genetic Physical Unclonable Function (PUF)) in every legitimately produced copy of a cell line. Akin to their counterparts in the semiconductor industry, Genetic PUFs can be used for attesting the provenance and protecting the intellectual property of valuable, genetically-engineered cell lines.

Biography
Yiorgos Makris received the Diploma of Computer Engineering from the University of Patras, Greece, in 1995 and the M.S. and Ph.D. degrees in Computer Engineering from the University of California, San Diego, in 1998 and 2001, respectively. After spending a decade on the faculty of Yale University, he joined UT Dallas where he is now a Professor of Electrical and Computer Engineering, the Co-Founder and Site-PI of the NSF Industry University Cooperative Research Center on Hardware and Embedded System Security and Trust (NSF CHEST I/UCRC), as well as the Leader of the Safety, Security and Healthcare Thrust of the Texas Analog Center of Excellence (TxACE) and the Director of the Trusted and RELiable Architectures (TRELA) Research Laboratory. His research focuses on applications of machine learning and statistical analysis in the development of trusted and reliable integrated circuits and systems. He has served as an Associate Editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, the IEEE Transactions on Information Forensics and Security and the IEEE Design & Test of Computers Periodical, and as a guest editor for the IEEE Transactions on Computers and the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. He has also served as the 2016-2017 General Chair and the 2013-2014 Program Chair of the IEEE VLSI Test Symposium. He is a recipient of the 2006 Sheffield Distinguished Teaching Award, Best Paper Awards from the 2013 IEEE/ACM Design Automation and Test in Europe (DATE’13) conference and the 2015 IEEE VLSI Test Symposium (VTS’15), as well as Best Hardware Demonstration Awards from the 2016 and the 2018 IEEE Hardware-Oriented Security and Trust Symposia (HOST’16 and HOST’18) and a recipient of the 2020 Faculty Research Award from the Erik Jonsson School of Engineering and Computer Science at UT Dallas.. Yiorgos is a Class of 2025 IEEE Fellow, for contributions to machine-learning-based design of trusted and reliable integrated circuits.

For more on Dr. Yiorgos Makris visit his website at https://personal.utdallas.edu/~gxm112130/.

Please join us on Friday, 2/28/25 at 10:20 a.m. in ETB 1020 to learn more and meet Dr. Yiorgos Makris!