Seminars

Tuesday, April 30, 2024

10:00 – 11:00 a.m.  (CST)
WEB 333’s Fishbowl

Dr. Kiran Kuchi
Professor, Department Electrical Engineering
Indian Institute of Technology Hyderabad

Title: “Orthogonal Time Frequency Multiplexing (OTFDM): A Novel Waveform Targeted for IMT-2030”

Abstract
The landscape of International Mobile Telecommunications (IMT) is rapidly evolving with the recent release of the ITU WP 5D recommendation, delineating the framework for IMT-2030. This initiative aims for inclusivity, ubiquitous connectivity, and sustainability while setting goals for coverage advancements and energy efficiency. IMT-2030 necessitates utilizing higher frequency bands and addresses challenges like hyper-low latency and high mobility. To meet these demands, a new waveform, Orthogonal Time Frequency Multiplexing (OTFDM), is proposed. OTFDM offers simultaneous transmission of data and Reference Signals with low PAPR, high energy efficiency, and support for very high mobility and hyper-low-latency. Results demonstrate its potential for future wireless communication systems.

Biography

Professor Kiran Kuchi is a Professor in the Department of Electrical Engineering at the Indian Institute of Technology Hyderabad. He leads 5G-advanced and 6G research and standards development efforts at 3GPP (Third Generation Partnership Program), a global body that develops cellular communications specifications. Professor Kuchi is the author of more than 200 international patents, some of them are declared as 5G standards essential patents (SEPs) to TSDSI and 3GPP.  Prof. Kuchi founded WiSig Networks Pvt Ltd, at IITH technology incubator. IITH and WiSig jointly developed and commercialized 5G base station and user equipment (UE) IPs and NB-IoT SoC.

For more on Dr. Kuchi, please see his LinkedIn page at in/kiran-kuchi-88113b2

Please join on Tuesday, 4/19/24 at 10:20 a.m. in ETB 1020.

Friday, April 19, 2024

10:20 a.m.  (CST)
ETB 1020

Dr. Jason O’Kane
Professor, Department of Computer Science and Engineering, Texas A&M University                                                                                                                                                                      

Title: “Robot Planning Near the Boundaries of Feasibility”

Abstract
The effectiveness of mobile robots operating in the physical world depends on their ability to sense and move through their environments.  Unfortunately, sensors provide only limited (and sometimes incorrect) information and actuators provide constrained (and sometimes unreliable) movement capabilities. These realities motivate a careful study of the information requirements of the problems our robots intend to solve.  In this talk, He will present an overview of his group’s ongoing research to enable robots to succeed in spite of strong limitations in sensing, motion, communication, and computation.  This work covers a variety of robotic tasks and spans from foundational results to deployments in the field.

Biography
Jason M. O’Kane is Professor of Computer Science and Engineering at Texas A&M University. He holds the Ph.D. and M.S. degrees from the University of Illinois at Urbana-Champaign and the B.S. degree from Taylor University, all in Computer Science.  His work has been recognized with a number of awards including the CAREER Award from the National Science Foundation, the Most Valuable Professor Award from the University of South Carolina, the Outstanding Graduate in Computer Science Award from Taylor University, the Distinguished Service Award from the IEEE Robotics and Automation Society, and the Engineering Genesis Award from Texas A&M. His research spans algorithmic robotics, planning under uncertainty, and computational geometry.

For more on Dr. Kane please see his TAMU Profile Website at https://engineering.tamu.edu/cse/profiles/okane-jason.html

Please join on Friday, 4/19/24 at 10:20 a.m. in ETB 1020.

Friday, April 12, 2024

10:20 a.m. – 11:10 a.m. (CST)
ETB 1020

Jennifer Dworak
Professor @ Southern Methodist University, Electrical and Computer Engineering

Title: “Keeping Customers Happy (and Safe)! Designing Circuits to Enhance Defect Detection and Avoid Errors and Silent Data Corruption“

Abstract
The impact of failing integrated circuits (ICs) can vary from an annoyance to a catastrophic failure.  Errors in circuit operation may arise due to defects that are present when a circuit is manufactured, latent defects that develop further over time and cause failures early in a circuit’s lifetime, and defects that arise later in the circuit’s lifetime due to aging.  Unfortunately, companies such as Meta have recently found that errors arising from hardware defects are occurring in the field at much higher rates than expected.  New ways of testing and monitoring circuits efficiently and effectively are required.

Biography
Jennifer Dworak is a Professor in the Department of Electrical and Computer Engineering at Southern Methodist University. Her research interests include manufacturing test, hardware security, and the reliability of digital circuits and systems.  She is a recipient of an NSF CAREER Award and a 2012 Ralph E. Powe Junior Faculty Enhancement Award funded by Oak Ridge Associated Universities.  She is a co-author on multiple technical articles, including two papers that won Best Paper Awards from the VLSI Test Symposium and a paper that won a TTTC Naveena Nagi Award.  Prof. Dworak also holds two patents on cybersecurity locks, keys, traps and honeypots and one patent on a laser-powered device for enhanced security.  She has given over 30 invited talks and been an invited panelist at multiple technical meetings in several countries.  Most recently, she has co-led the effort that led to the Texoma Semiconductor Tech Hub, a consortium of 52 organizations led by SMU, being designated as an official EDA Tech Hub. Prof. Dworak holds PhD, MS, and BS degrees in electrical engineering from Texas A&M University in College Station, TX, USA.

For more on Dr. Dworak please see her SMU Website at https://www.smu.edu/lyle/departments/ece/people/faculty-and-staff/jennifer-dworak

Please join on Friday, 4/12/24 at 10:20 a.m. in ETB 1020.

Friday, April 5, 2024

10:20 a.m. – 11:10 a.m. (CST)
ETB 1020

Parthasarathy (Partha) Ranganathan
VP / Technical Fellow | Google

Title: “A 6-Word Story on the Future of Infrastructure: AI-Driven, Software-Defined, Uncomfortably Exciting“

Abstract
We are at an interesting inflection point in the design of computing systems. On one hand, demand for computing is accelerating at phenomenal rates, powered by the AI revolution and ever deeper processing on larger volumes of data, and amplified by smart edge devices and cloud computing. On the other hand, Moore’s law is slowing down. This is challenging traditional assumptions around cheaper and more energy-efficient systems every generation and leading to a significant supply-demand gap for future computing systems. In this talk, we discuss how this current computing landscape motivates a significant rethinking of how we design future infrastructure. We present two broad themes around (1) efficient systems design through custom silicon accelerators and (2) efficient systems utilization through software-defined infrastructure. We will summarize our experience in these areas and discuss key learnings and future opportunities for innovation. Looking ahead, we will highlight some additional grand challenges and opportunities for the community, specifically touching on key themes around agility, modularity, reliability, and sustainability, as well as the disruptive potential of cloud computing, and the opportunities beyond compute, around storage.

Biography
Parthasarathy (Partha) Ranganathan is currently a VP, Technical Fellow at Google where he is the area technical lead for hardware and datacenters, designing systems at scale. Prior to this, he was a HP Fellow and Chief Technologist at Hewlett Packard Labs where he led their research on system and data centers. Partha has worked on several interdisciplinary systems projects with broad impact on both academia and industry, including widely used innovations in energy-aware user interfaces, heterogeneous multi-cores, power-efficient servers, accelerators, and disaggregated and data-centric data centers. He has published extensively (including being the co-author on the popular “Datacenter as a Computer” textbook), is a co-inventor on more the 100 patents, and has been recognized with numerous awards. He has been named a top-15 enterprise technology rock star by Business Insider, one of the top 35 young innovators in the world by MIT Tech Review, and is a recipient of the ACM SIGARCH Maurice Wilkes Award, Rice University’s Outstanding Young Engineering Alumni Award, and the IIT Madras Distinguished Alumni Award. He is one of few computer scientists to have his work recognized with an Emmy award. He is also a Fellow of the IEEE and ACM and has served on the board of directors for OpenCompute.

Please join on Friday, 4/5/24 at 10:20 a.m. in ETB 1020.