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Seminars

CESG Seminar: Shuiwang Ji

Posted on September 6, 2023 by Caroline Jurecka

Friday, September 15, 2023
10:20 a.m. – 11:10 a.m. (CST)
ETB 1020

Shuiwang Ji
Professor at Dept. of Electrical & Computer Engineering
Texas A&M University

Title: “AI for Science in Quantum, Atomistic, and Continuum Systems”

Talking Points: 

  • How to use AI to solve problems in physics, chemistry, material science, and fluid mechanics
  • How to capture symmetries in physical systems
  • How to use AI for advance basic science

Abstract

Advances in AI are fueling a new paradigm of discoveries in natural sciences. Today, AI has started to advance natural sciences by improving, accelerating, and enabling our understanding of natural phenomena at a wide range of spatial and temporal scales, giving rise to a new area of research known as AI for science (AI4Science). In this talk, I will provide an overview of our recent work on understanding the physical world from the subatomic (wavefunctions and electron density), atomic (molecules, proteins, materials, and interactions), to macro (fluids, climate) scales. My talk will focus on how to capture symmetries in physical systems using equivariant models. I will also touch on a few other technical challenges, including explainability, out-of-distribution generalization, and knowledge transfer with foundation and large language models. My talk will be a summary of our recent 263-page review paper available at https://arxiv.org/abs/2307.08423

Biography

Dr. Shuiwang Ji is currently a Professor and Presidential Impact Fellow in the Department of Computer Science & Engineering, Texas A&M University. His research interests include machine learning and AI for science. Dr. Ji received the National Science Foundation CAREER Award in 2014. Currently, he serves as an Associate Editor for IEEE Transactions on Pattern Analysis and Machine Intelligence (TPAMI), ACM Transactions on Knowledge Discovery from Data (TKDD), and ACM Computing Surveys (CSUR). He regularly serves as an Area Chair for ICLR, ICML, and NeurIPS. Dr. Ji is a Fellow of IEEE and AIMBE, and a Distinguished Member of ACM.

Recent Paper: https://arxiv.org/abs/2307.08423

More on Shuiwang Ji: http://people.tamu.edu/~sji/

More on CESG Seminars: HERE

Please join on Friday, 9/15/23 at 10:20 a.m. in ETB 1020.

Filed Under: Seminars

CESG Seminar: P.R. Kumar

Posted on August 31, 2023 by Vickie Winston

Friday, September 8, 2023
10:20 a.m. – 11:10 a.m. (CST)
ETB 1020

P. R. Kumar
Professor at Dept. of Electrical & Computer Engineering
Texas A&M University

Title: “Security of Cyber-Physical Systems: Theory and Applications of the Dynamic Watermarking Method”

Talking Points: 

  • How to protect our critical infrastructure from cyber-attacks?
  • How to secure the power grid, oil refineries, autonomous vehicles?
  • What sort of guarantees can be provided?

Abstract

The coming decades will see the large scale deployment of networked cyber–physical systems to address global needs in energy, water, health care, transportation, etc. However, as recent events have shown, such systems are vulnerable to cyber attacks.  We present a general purpose technique, called “dynamic watermarking,” for detecting malicious activity in networked systems of sensors and actuators. It provides a provable guarantee of detection of any non-zero power attack. This method has been implemented in several systems of interest. We present the results of attacks on an autonomous automobile, a grid-tied photovoltaic system, a process control system, and a tethered helicopter. We also present the results of simulation studies of attacks on larger scale systems such as the power grid, through attacks on its automatic gain control loop, and attacks on the Tennessee-Eastman model, an open source benchmark that has been developed for the purpose of evaluating process control technology used in industries such as chemical plants and oil refineries. [Joint work with Kenny Chour, Tong Huang, Hasan Ibrahim, Gopal Kamath, Jaewon Kim, Woo Hyun Ko, Tzu-Hsiang Lin, Jorge Ramos-Ruiz, Bharadwaj Satchidanandan, Lantian Shangguan, Bin Wang, Prasad Enjeti, Swaminathan Gopalswamy, and Le Xie].

Biography

Dr. Kumar has a B.Tech. from IIT Madras (1973), and D.Sc. from Washington University (1977). After serving in the Math Department, UMBC (1977-84), and ECE and CSL, UIUC (1985-2011), he joined Texas A&M. He is a member of the U.S. NAE, the World Academy of Sciences, and the Indian NAE. He was awarded an honorary doctorate by ETH, Zurich. He has received the Alexander Bell Medal of IEEE, the IEEE Field Award for Control Systems, and the Outstanding Contribution Award of ACM SIGMOBILE. He has also received the Eckman Award of AACC, the Ellersick Prize of IEEE COMSOC, the Infocom Achievement Award, and the SIGMOBILE Test-of-Time Paper Award. He is a Fellow of IEEE, an ACM Fellow, and Fellow of IFAC. He was awarded the Distinguished Alumnus Award from IIT Madras, Alumni Achievement Award from Wash U, and Drucker Eminent Faculty Award from CoE, University of Illinois. His current research focus includes reinforcement learning, security, privacy, power systems, automated transportation, unmanned aerial vehicle traffic management, millimeter wave 5G, snd cyber-physical systems.


More on P.R. Kumar: P. R. Kumar (tamu.edu)

More on CESG Seminars: HERE

Please join on Friday, 9/8/23 at 10:20 a.m. in ETB 1020.

Filed Under: Seminars

CESG Seminar: Sunil Khatri

Posted on August 28, 2023 by Vickie Winston

Friday, September 1, 2023
10:20 a.m. – 11:10 a.m. (CST)
ETB 1020, In-Person Presentation Only

Sunil Khatri
Professor at Dept. of Electrical & Computer Engineering
Texas A&M University

Title: “Flash – the ‘Overlooked’ Technology”

Talking Points: 

  • Flash technology has historically been used for non-volatile memory
  • Can flash be used for digital, analog and mixed-signal circuits also?
  • This talk posits that it can, and thus holds great promise for VLSI circuit design broadly

Abstract

Flash has been the workhorse technology for non-volatile memories for many years now. In this talk, I show that flash technology can be used to design a variety of general-purpose circuits, both digital and analog. This is demonstrated via case studies that demonstrate two styles of flash-based ASIC design (including a secure variant), flash-based convolutional neural network accelerators (both analog and digital variants), flash-based in-memory computing designs, as well as flash-based analog circuits like DACs and LDOs. Through these studies, we demonstrate several advantages of flash-based designs over conventional CMOS designs,and argue that flash is an overlooked technology in digital and analog design. Some of these advantages of flash are not present in CMOS, such as performance tunability, the ability to counteract circuit aging, the control of speed binning, and the ability to mitigate process variations.

Based on our findings, we posit that the programmability, robustness, stability, and maturity of flash give it a significant edge over the class of “emerging” technologies, making flash a viable technology to eventually replace CMOS.  We hope that our body of work on flash will encourage further research and deployment in the arena of scaling flash to smaller process node geometries, thereby allowing flash to become a key technology for digital and analog circuits in the future.

Biography

Dr. Sunil P Khatri received his PhD from UC Berkeley, his MS from UT Austin, and his BS degree from IIT Kanpur (India). He currently serves as a Professor in ECE at Texas A&M University. His research areas are VLSI IC/SOC design (including hardware-based machine intelligence, secure hardware design, classical and quantum logic synthesis, radiation tolerant design and fast clocking), algorithm acceleration using custom hardware, FPGAs and GPUs, and interdisciplinary extensions of these topics to other areas like communication, DSP, IoT and genomics.

He has co-authored the first papers in many areas, resulting in impactful contributions that changed industrial practice in the areas of regular fabric-based VLSI design approaches, cross-talk canceling CODECs to eliminate on-chip and off-chip crosstalk in VLSI bus interconnect, GPU-based acceleration of VLSI CAD algorithms, and high-speed off-chip output drivers with self-adjusting impedance. Dr. Khatri has over 280 peer reviewed publications. Among these papers, 5 received a best paper award while 7 others received best paper nominations.


More on Sunil Khatri: Sunil Khatri (tamu.edu)

More on CESG Seminars: HERE

Please join on Friday, 9/1/23 at 10:20 p.m. in ETB 1020.

Filed Under: Seminars

CESG SEMINAR: Aditya Arun

Posted on May 8, 2023 by Vickie Winston

Friday, May 12, 2023
11:00 a.m. – 12:00 p.m. (CST)
Fishbowl (WEB 333), In-Person Presentation Only

Aditya Arun, PhD Student
Center of Wireless Communications (CWC) and Contextual Robotics Institute (CRI)
University of California, San Diego 

Title: “Leveraging WiFi for Robust and Resource-Efficient SLAM”

Talking Points: 

  • Simultaneous localization and mapping (SLAM) issues such as errors in odometry or visual sensor measurements, and “Loop closures”
  • Perceptual aliasing, loop closure failures, and deployments on small form-factor hardware
  • Incorporation of  Wi-Fi sensors within existing SLAM systems

Abstract
Indoor robots can increasingly deliver value in diverse industry segments, including logistics, security, and construction. This demand has consequently increased the importance of robust simultaneous localization and mapping (SLAM) algorithms for indoor robots. This robustness is typically provided by fusing information from visual sensors (LiDARs or cameras) with proprioceptive sensors (odometers or IMUs). However, visual sensors can be sensitive to perceptual aliasing, visually dynamic environments, and changing lighting conditions, resulting in failures in SLAM predictions.

In this talk, I will present WiFi radios as camera-like sensors capable of circumventing these issues and develop a real-time SLAM system to provide drift-free trajectory updates. We build our system with off-the-shelf components and evaluate it over four large-scale datasets in three indoor environments, traveling a cumulative distance of over 1500 m. Through these extensive evaluations, we find employing WiFi-based sensing provides a 6x improvement over purely relying on odometry. Additionally, we see a 4x reduction in compute and memory consumption compared to state-of-the-art Visual and Lidar SLAM systems.

Biography
Aditya Arun is a fourth-year Ph.D. student at the University of California, San Diego, advised by Dinesh Bharadia. He is part of the WCSNG group, the Center for Wireless Communications (CWC), and the Contextual Robotics Institute (CRI). His larger research vision is to incorporate WiFi and other wireless technologies as sensing modalities to improve the world of robotics and enable robotics to solve real-world problems. His research interests span wireless sensing, robotics, signal processing, and networking. Previously, he completed his B.S. from the University of California, Berkeley.

More on Aditya Arun: http://wcsng.ucsd.edu/aarun/

More on CESG Seminars: HERE

Please join on Friday, 5/12/23 at 11:00 a.m. in the Fishbowl (WEB 333).

Filed Under: Seminars

CESG Seminar: Vasudev Gohil

Posted on April 19, 2023 by Vickie Winston

Friday, April 28, 2023
3:50 – 4:50 p.m. (CST)
ETB 1020 or Zoom (see syllabus or email list for link)

Vasudev Gohil
CE PhD Student
Dept. of Electrical and Computer Engineering; Computer Engineering
Texas A&M University

Title: “Reinforcement Learning for Hardware Security ”

Talking Points

  • Security threats such as hardware Trojans due to a globalized integrated circuits supply chain
  • Using reinforcement learning to detect hardware Trojans efficiently and effectively
  • Using reinforcement learning to evaluate hardware Trojan detection techniques accurately

Abstract
Reinforcement learning (RL) has shown great promise in solving problems in novel domains, e.g., marketing, chip placement, and matrix multiplication. In this talk, I will discuss another area that has just begun to reap the powers of RL: hardware security. In particular, I will discuss two of our recent works that use RL to address the threat of hardware Trojans (HTs) in integrated circuits. HTs are malicious logic added by adversaries to harm integrated circuits. They pose a significant threat to critical infrastructures and have been the focus of much research.

In the first part of the talk, I will present a reinforcement learning (RL) agent that returns a minimal set of patterns most likely to detect HTs. Our experimental results demonstrate the efficacy and scalability of our RL agent, which significantly reduces the number of test patterns while maintaining or improving coverage compared to state-of-the-art techniques. In the second part of the talk, I will discuss how we play the role of a realistic adversary and question the efficacy of existing HT detection techniques by developing an automated, scalable, and practical attack framework. Our framework uses RL to evade eight detection techniques across two HT detection categories, demonstrating its agnostic behavior.

Using the example of HTs, our work highlights the potential of RL in solving hardware security problems. The talk will conclude with a discussion of future directions for research in this area.

Biography

Vasudev Gohil is pursuing a Ph.D. in Computer Engineering at Texas A&M University in College Station, Texas. His research interests lie at the intersection of machine learning and hardware security. He is keenly interested in examining and developing IP protection techniques and applying reinforcement learning techniques for security. Before his doctoral studies, Vasudev received a Bachelor of Technology degree in Electrical Engineering with minors in Computer Science from the Indian Institute of Technology Gandhinagar.

More on Vasudev Gohil: https://gohilvasudev.wixsite.com/website

More on CESG Seminars: HERE

Please join on Friday, 4/28/22 at 3:50 p.m. in ETB 1020 or via Zoom.
Zoom option: Links and PW in syllabus or found in email announcement.

Filed Under: Seminars

CESG Seminar: Archana Bura

Posted on March 29, 2023 by Vickie Winston

Friday, March 31, 2023
3:50 – 4:50 p.m. (CST)
Zoom (see syllabus or email list for link)

Archana Bura 
PhD Candidate, Spring 2023
Dept. of Electrical and Computer Engineering
Texas A&M University

Title: “Constrained Reinforcement Learning for Wireless Networks ”

Talking Points

  • Challenges in learning under real world problems with constraints
  • Developing CRL algorithms for two real world resource allocation problems under constraints
  • Safe exploration in learning a generic Constrained MDP

Abstract
In this talk, I will discuss how we efficiently applied reinforcement learning methods for real world problems. I consider two motivating real world problems: Resource allocation for Media streaming at the Wireless edge, and Resource block allocation in an Open RAN system. Under throughput, latency and resource constraints, these systems can be modeled by Constrained Markov Decision Processes (CMDPs). Since these systems have complex dynamics, a constrained reinforcement learning (CRL) approach is attractive for determining an optimal control policy. Applying off-the-shelf RL algorithms yields better results compared to naive solutions, but these algorithms need a lot of samples to train or have high complexity. We overcome these issues by providing CRL methods that efficiently utilize the structure in the problem. Motivated by these results, we study the fundamental “safe exploration” problem in a generic CRL, and propose a safe RL method that does not violate constraints during the learning process with high probability.

Biography
Archana Bura is a PhD candidate at Texas A&M University’s Department of Electrical and Computer Engineering, where she specializes in constrained reinforcement learning. Her research centers around implementing RL for real world problems, where safety is critical, by developing algorithms and theory of constrained reinforcement learning that leverage structure to enhance the learning process.

More on Archana Bura: HERE

More on CESG Seminars: HERE

Please join on Friday, 3/31/22 at 3:50 p.m. via Zoom.
Zoom option: Links and PW in syllabus or found in email announcement.

Filed Under: Seminars

CESG Seminar: Peipei Zhou

Posted on March 1, 2023 by Vickie Winston

Friday, April 21, 2023
3:50 – 4:50 p.m. (CST)
ZOOM

Peipei Zhou
Assistant Professor
Dept. Electrical and Computer Engineering
University of Pittsburgh

Title: “CHARM: Composing Heterogeneous AcceleRators for Matrix Multiply on Versal ACAP Architecture”

Talking Points

  • Which platform beats 7nm GPU A100 in energy efficiency? AMD Versal ACAP (FPGA+AI Chip)!
  • How to program AMD Versal ACAP, i.e., FPGA + AI Chip within the same chip die for deep learning applications in 10 lines of code? Use CHARM!

Abstract
Dense matrix multiply (MM) serves as one of the most heavily used kernels in deep learning applications. To cope with the high computation demands of these applications, heterogeneous architectures featuring both FPGA and dedicated ASIC accelerators have emerged as promising platforms. For example, the AMD/Xilinx Versal ACAP architecture combines general-purpose CPU cores and programmable logic (PL) with AI Engine processors (AIE) optimized for AI/ML. An array of 400 AI Engine processors executing at 1 GHz can theoretically provide up to 6.4 TFLOPs performance for 32-bit floating-point (fp32) data. However, machine learning models often contain both large and small MM operations. While large MM operations can be parallelized efficiently across many cores, small MM operations typically cannot. In our investigation, we observe that executing some small MM layers from the BERT natural language processing model on a large, monolithic MM accelerator in Versal ACAP achieved less than 5% of the theoretical peak performance. Therefore, one key question arises: How can we design accelerators to fully use the abundant computation resources under limited communication bandwidth for end-to-end applications with multiple MM layers of diverse sizes? In this talk, we will discuss CHARM framework to compose multiple diverse MM accelerator architectures working concurrently towards different layers within one application. CHARM includes analytical models which guide design space exploration to determine accelerator partitions and layer scheduling. To facilitate the system designs, CHARM automatically generates code, enabling thorough onboard design verification. We deploy the CHARM framework for four different deep learning applications, including BERT, ViT, NCF, and MLP, on the AMD/Xilinx Versal ACAP VCK190 evaluation board. Our experiments show that we achieve 1.46 TFLOPs, 1.61 TFLOPs, 1.74 TFLOPs, and 2.94 TFLOPs inference throughput for BERT, ViT, NCF, MLP, respectively, which obtain 5.40x, 32.51x, 1.00x and 1.00x throughput gains compared to one monolithic accelerator.

Biography
Peipei Zhou is an assistant professor of the Electrical Computer Engineering (ECE) department at the University of Pittsburgh. She has over 10 years of experience in hardware and software co-design. She has published 20+ papers in top-tier IEEE/ACM computer system and design automation conferences and journals including FPGA, FCCM, DAC, ICCAD, ISPASS, TCAD, TECS, TODAES, IEEE Micro, etc. The algorithm and tool proposed in her FCCM’18 paper have been realized in the commercial Vitis HLS (high-level synthesis) compiler from Xilinx (acquired by AMD in Feb 2022). Her work in FPGA acceleration for deep learning won the 2019 Donald O. Pederson Best Paper Award from the IEEE Council for Design Automation (CEDA). Her work in cloud-based application optimization won the 2018 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) Best Paper Nominee and her work in FPGA acceleration for computer vision won the 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Best Paper Nominee. Before joining Pitt, she worked as a full-time staff software engineer in a start-up company and led a team of 6 members to develop CNN and MM kernels in the deep learning libraries for two generations of AI training application-specific integrated circuit (ASIC) chip products.

More on Dr. Zhou:
Homepage: https://peipeizhou-eecs.github.io/
Google Scholar: https://scholar.google.com/citations?user=px_jwFgAAAAJ&hl=en

More on CESG Seminars: HERE

Please join on Friday, 4/21/22 at via Zoom (see emails or syllabus for link and password)

Filed Under: Seminars

CESG Seminar: Desik Rengarajan

Posted on February 21, 2023 by Vickie Winston

Friday, March 24, 2023
3:50 – 4:50 p.m. (CST)
Zoom (see syllabus or email list for link)

Desik Rengarajan 
PhD Candidate, Spring 2023
Dept. of Electrical and Computer Engineering
Texas A&M University

Title: “Enhancing Reinforcement Learning Using Data and Structure”

Talking Points

  • Challenges in learning in sparse reward environments
  • Developing RL algorithms that take advantage of sub-optimal demonstration data to learn in sparse reward environments
  • Developing meta-RL algorithms that take advantage of sub-optimal demonstration data and structure to learn in sparse reward environments

Abstract
In reinforcement learning, reward functions serve as an indirect method of defining the goal of the algorithm. Designing a reward function that accurately captures the task at hand while effectively guiding the learning process can be a difficult challenge, requiring expert domain knowledge and manual fine-tuning. To overcome this, it is often easier to rely on sparse rewards that merely indicate partial or complete task completion. However, this leads to RL algorithms failing to learn an optimal policy in a timely manner due to the lack of fine-grained feedback. During this talk, I will delve into the impact of sparse rewards on reinforcement and meta reinforcement learning and present algorithms that leverage sub-optimal demonstration data to overcome these challenges.

Biography
Desik Rengarajan is a PhD candidate at Texas A&M University’s Department of Electrical and Computer Engineering, where he specializes in reinforcement learning. His research centers on the development of reinforcement learning algorithms that take advantage of side information, such as demonstration data and structure, to enhance the learning process and overcome challenges that arise when implementing RL in real-world situations.

More on Desik Rengarajan: HERE

More on CESG Seminars: HERE

Please join on Friday, 3/24/22 at 3:50 p.m. via Zoom.
Zoom option: Links and PW in syllabus or email announcement.

Filed Under: Seminars

CESG Seminar: Manoranjan Majji

Posted on February 13, 2023 by Vickie Winston

Friday, February 24, 2023
3:50 – 4:50 p.m. (CST)
ETB 1020 

Dr. Manoranjan Majji
Associate Professor
Dept. of Aerospace Engineering
Texas A&M University

Title: “Advances in Computer Engineering: Impact on Aerospace Applications ”

Talking Points

  • Revolutions in computing continue to advance a wide variety of aerospace vehicle navigation and control problems. Three broad applications are discussed to demonstrate this tangible impact.
  • Recent research advances in space manufacturing and assembly automation at LASR lab.
  • Novel velocimeter LIDAR and interferometric rate sensing technologies developed by Prof. Majji and his students are discussed.
  • New embedded processing pipelines developed by Prof. Majji’s students to estimate the forces sensed by optomechanical accelerometers developed by Prof. Guzman are elaborated.

Abstract

Recent advances in aerospace vehicle guidance, navigation and control furthered by emerging computer engineering technologies are elaborated in the lecture. Novel approaches for relative navigation using doppler sensing technologies are outlined with applications to terrain relative navigation and ship landing. Approaches to automate space systems and manufacture elements of swarm satellites in space are demonstrated using proximity operation emulation robots developed at the Land, Air and Space Robotics (LASR) laboratory. Embedded compute elements to process sensor data in order to realize an advanced optomechanical accelerometer are described to showcase advances in space avionics. The new accelerometer technology developed in collaboration with Prof. Felipe Guzman is discussed, which is found to enable spacecraft autonomy.

Biography
Dr. Manoranjan Majji is an Associate Professor of Aerospace Engineering and is the Director of the Land, Air and Space Robotics (LASR) Laboratory at Texas A&M University. He has a diverse background in several aspects of dynamics and control of aerospace vehicles with expertise spanning the whole spectrum of analysis, modeling, computations and experiments. In the areas of astrodynamics, estimation and system identification, he has made fundamental contributions documented in over 170 publications (including 45 journal articles) in the areas of guidance, navigation and control. Working with a team of 20 graduate students and 6 undergraduate researchers at the LASR lab, he works on a variety of research projects sponsored by NGA, NASA, JPL, AFRL, AFOSR, ONR, DARPA, JHTO, and the IC, in addition to various industrial partners, including BlackSky Geospatial, Dezyne Technologies, and VectorNav Technologies. His 10 PhD graduates are making valuable contributions in the academic, national laboratory, and industrial research establishments. In addition to being a scholar, Majji has a great deal of engineering experience developing software systems and embedded systems from OEM products. He holds a provisional patent on a simultaneous location and mapping software suite and was awarded a patent for developing a novel omni directional robot. He has disclosed various sensor inventions in the past decade. Manoranjan is the recipient of the 2021 Dean of Engineering Excellence Award at Texas A&M and the 2021 Texas A&M Institute of Data Science Career Initiation Fellowship. He is an Associate Fellow of the American Institute of Aeronautics and Astronautics (AIAA), a senior member of the Institute of Electrical and Electronics Engineers (IEEE), and is a Fellow of the American Astronautical Society (AAS).

More at https://cesg.tamu.edu/people-2/faculty/jiang-hu/

More on CESG Seminars: HERE

Please join on Friday, 2/24/22 at 3:50 p.m. in ETB 1020.
Zoom option: Links and PW in syllabus or email announcement.

Filed Under: Seminars

CESG Seminar: Jiang Hu

Posted on February 2, 2023 by Vickie Winston

Friday, February 10, 2023
3:50 – 4:50 p.m. (CST)
ETB 1020 

Dr. Jiang Hu
Professor
Dept. of Electrical and Computer Engineering
Affiliate of Computer Science Electrical and Computer Engineering
Texas A&M University

Title: “Machine Learning for EDA and EDA for Machine Learning”

Talking Points

  • A stochastic approach to handling noisy labels in machine learning models for chip design automation
  • An analytical approach to co-optimization of CNN hardware and dataflow mapping

Abstract
The wave of machine learning splashes to almost every corner of the world due to its unprecedented success. The first part of this talk will be focused on how to leverage machine learning for EDA (Electronic Design Automation). Specifically, a machine learning-based early routability prediction technique will be introduced. This technique provides a stochastic approach to handling non-deterministic data labels, which may exist in other machine learning applications. In the second part, an EDA technique for ML hardware acceleration will be presented. This is the first analytical approach to CNN hardware and dataflow co-optimization, and outperforms state-of-the-art methods in terms of both solution quality and computation runtime.

Biography
Dr. Jiang Hu is a professor in the Department of Electrical and Computer Engineering at Texas A&M University. His research interests include design automation of VLSI circuits and systems, computer architecture optimization and hardware security. He has published over 240 technical papers. He received best paper awards at DAC 2001, ICCAD 2011, MICRO 2021 and ASPDAC 2023. He was the technical program chair and the general chair of the ACM International Symposium on Physical Design (ISPD) in 2011 and 2012, respectively. He was named an IEEE fellow in 2016. He will serve as the program co-chair for ACM/IEEE Workshop on Machine Learning for CAD 2023.

More at https://cesg.tamu.edu/people-2/faculty/jiang-hu/

More on CESG Seminars: HERE

Please join on Friday, 2/10/22 at 4:10 p.m. in ETB 1020.
Zoom option: Links and PW in syllabus or email announcement.

Filed Under: Seminars

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