EE 449/749 — Microprocessor System Design.

Spring 2019

Instructor:

Sunil P Khatri, email:i r t a h k l i n u s (spell backwards, drop spaces) at tamu dot edu
Phone:845-8371
Office:Wisenbaker 333F

Class Hours:

Monday, Wednesday 03:00 pm-04:00 pm, ZACH 341
Monday, Wednesday 05:45 pm-06:45 pm, ZACH 241

Lab Hours:

Section 200/501/601: Tue, 8 AM – 9:50 AM, ZACH 333
Section 502/602: Tue, 10:35 AM – 12:25 PM, ZACH 333
Section 503/603: Tue, 12:45 PM – 2:35 PM, ZACH 333
Section 504/604: Tue, 3:20 PM – 5:10 PM, ZACH 333.
Section 505/605: Tue, 5:30 PM – 7:20 PM, ZACH 333.
Section 506/606: Th, 8 AM – 9:50 AM, ZACH 333
Section 507/607: Th, 10:35 AM – 12:25 PM, ZACH 333
Section 508/608: Th, 12:45 PM – 2:35 PM, ZACH 333
Section 509/609: Th, 3:20 PM – 5:10 PM, ZACH 333.
Section 510/610: Th, 5:30 PM – 7:20 PM, ZACH 333.
Office hours (in Wisenbaker 333F)
Mon 2:00pm – 3:00pm
Wed 2:00pm – 3:00pm

TA Information:

  1. Name: Andrew Douglass
    Sections: 503/603, 504/604, 508/608
    Office: ZACH 330/334
    E-mail: adoulgas@tamu.edu
    Office Hours: Tue/Thu 2:35p – 3:15p (ZACH 330), Tue 9:30a – 10:50a (ZACH 334)
  2. Name: Kunal Bharathi
    Sections: 200/501/601, 502/602, 507/607
    Office: ZACH 330
    E-mail: kunal-bharathi@tamu.edu
    Office Hours: Mon 11:00a – 1:00p
  3. Name: Kyler Scott
    Sections: 506/606, 509/609, 510/610
    Office: ZACH 330
    E-mail: kylerrscott@tamu.edu
    Office Hours: Wed 10:00a to 12:20p
  4. Name: Swathi Changalarayappa
    Sections: 505/605
    Office: CVLB 416
    E-mail: swathi_c@tamu.edu
    Office Hours: Mon 11:00a – 1:00p
Graders (all sections):
449and749graders@gmail.com
Class conscience:
(3:00pm class) Aaron Parks-Young (aaron.parks-young@tamu.edu)
(5:45pm class) Sanjana Srinivasan (sanjana9630@tamu.edu)

Resources:

Class Notes:

Posted here on this web page. The notes are either developed by the course instructors or derived from other original copyrighted classnotes.
    1. Grading policy:

      • Homeworks 20%.
        • I will assign homework assignments on Wednesday, and you will have one week to turn in your solution via Ecampus. 50% credit will be given for homework that is late by a week. 0% credit will be given for homework that is late by more than a week.
        • Upload your homework solution to ecampus as a single PDF file.
        • Your homework solution should include a listing of any C code or Verilog code, along with any output obtained when the code is run. DO NOT include pictures of your code in your homework solution file, instead, copy the text of your C or Verilog code into your homework solution file.
        • DO NOT upload a zip file.
        • You will have only ONE attempt to upload your homework solution.
        • In addition, your source code (any C code or Verilog code or testbenches) should be sent via email to 449and749graders@gmail.com. Your email title should state your NAME, SECTION NUMBER and HOMEWORK NUMBER. Name your files in a way that identifies the homework number and the question (e.g. hw1-Q1b.v). For all the code that you write, please provide comments for full credit. Your code will be compiled and tested by the graders.
      • Lab 30%
        • The lab grade will be equally divided among the number of lab sessions. You will be paired up based on the TA’s discretion.
        • Lab reports must be turned in individually. Lab reports for week i should be turned in at the start of the lab of week i+1.
        • 50% credit will be given for reports that are late by a week. 0% credit will be given for reports that are late by more than a week.
        • For full credit, you should include comments in any code (Verilog or C) that you include in the lab report.
        • If any student misses a lab session, they will receive no credit at all for the lab session, even if they turn in the lab report for that lab session.
      • Two tests 50%
        • Test1 (2 hours) 25%, Test2 (2 hours) 25%. Both tests will be open notes, and may have lab related questions. Test2 will be cumulative.
        • TEST 1: Wed March 6, 8pm to 10pm. Location TBA
        • TEST 2: Fri April 26, 8pm to 10pm. Location TBA
        • Extended office hours will be held in my office before each test. The times for these office hours will be announced closer to the time of the test.
      • EE449 and EE749 will be graded on a separate curve. Graduate (EE749) students will have additional “G” questions on homework assignments and exams. These questions will be numbered “G1”, “G2” etc. These questions are mandatory for students registered for ECEN 749, and will count towards the grade. If an ECEN 449 student attempts these questions, they will be graded, but will NOT count towards the grade.

Course Objective:

  • The goal of this course is to provide the student with an in-depth knowledge of digital circuit design using an embedded platform as an implementation method. We will cover hardware and software co-design, using a commercial FPGA with an embedded on-chip microprocessor.
  • At the end of the course the student should be able to view the design of digital systems from a embedded hardware/software perspective and obtain a set of fundamental concepts and design skills that can be applied to a wide variety of digital design problems.

Important Logistical Issues:

  • As indicated in the first week of class, you are responsible to read this page and familiarize yourself with the important logistical information on it.
  • *Excused absences:* Rules concerning excused absences may be found at http://student-rules.tamu.edu/rule7.htm. In particular, except for absences due to religious obligations, the student must notify his or her instructor in writing (acknowledged e-mail message is acceptable) prior to the date of absence if such notification is feasible. In cases where advance notification is not feasible (e.g., accident, or emergency) the student must provide notification by the end of the second working day after the absence. This notification should include an explanation of why notice could not be sent prior to the class. If the absence is excused, the instructor must either provide the student with an opportunity to make up any quiz, exam or other graded activities or provide a satisfactory alternative to be completed within 30 calendar days from the last day of the absence.
  • *Days of religious observance:* By state law, if a student misses class due to an obligation of his or her religion, the absence is excused. A list of days of religious obligation for the coming semester may be found at http://dof.tamu.edu/faculty/policies/religiousobservance.php.
  • *Disruptive behavior:* If a student’s behavior in class is sufficiently disruptive to warrant immediate action, the instructor is entitled to remove a student on an interim basis, pending an informal hearing with the Head of the Department offering the course. This hearing must take place within three working days of the student’s removal. This rule and supporting information may be found at http://studentrules.tamu.edu/rule21.htm.
  • *Accommodations for students with disabilities:* It is the responsibility of the student to provide instructors with documentation showing they have registered with Disability Services and requested accommodation. Instructors then have the responsibility to work with Disability Services to provide reasonable accommodations. If a student who has not registered with Disability Services requests an accommodation, they should be referred to Disability Services at http://disability.tamu.edu .
  • *Email Policy:* Please remember that your official TAMU email will be used as an official means of communicating class information to you.
  • *Academic Honesty:* Remember that plagiarism will not be tolerated and will be dealt with under the Aggie Honor System Office guidelines. Upon discovering a suspected violation of the Aggie Honor code, I will contact the Aggie Honor System office http://www.tamu.edu/aggiehonor/.

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Tentative Schedule -subject to change
Week Monday Topic Wednesday Topic Laboratory Comments
1 (01/14,01/16) Class overview Verilog No Lab this week!!!
FPGA Board Reference Manual 
FPGA Board Schematics
Homework and Lab – Policy and Tips – PDF
2 (01/21,01/23) No Class – MLK Day Verilog Lab1 – Vivado
3 (01/28,01/30) Verilog Verilog Lab2 – SDK
4 (02/4,02/6) Verilog C Programming Lab3 – Hardware and Software HW1 out, due 2/13
5 (02/11,02/13) C Programming Tips on C Programming Lab4 – Booting Linux HW1 solutions
6 (02/18,02/20) FPGAs (User Aspects) FPGAs (User Aspects) Lab5 – Simple Kernel Module HW2 out, due 2/27 
Margin-notes-Verilog 
Margin-notes-C-prog 
Margin-notes-C-tips 
Margin-notes-FPGA 
Margin-notes-linux 
Margin-notes-pulse 
Margin-notes-hwsw-comm 
Margin-notes-trans-lines
7 (02/25,02/27) Linux Introduction Linux Introduction Lab6 – Device Drivers HW2 solutions 
Sample Exam 1 
Sample Exam 1 Solution
8 (03/4,03/6) Linux Introduction Linux Introduction Lab7 -IR Remote HW TEST 1 on Wednesday 3/06 from 8pm to 10pm. Location ARCB 101
(03/11,03/13) Spring break Spring break Spring break Spring break
9 (03/18,03/20) Exam discussion Pulse Modulation Continue with Lab 7
10 (03/25,03/27) Pulse modulation Pulse modulation Lab8 – Interrupt Driven IR Remote Device Driver HW3 out 03/27, due 04/3 
11 (04/1,04/3) AC97 CODEC Hardware-software Communication Continue with Lab 8 HW3 solutions
12 (04/8,04/10) Hardware-software Communication FPGAs and reconfigurable computing Lab9 – Linux built-in Kernel Modules HW4 out 04/10, due 04/17
13 (04/15,04/17) FPGAs and reconfigurable computing FPGAs and reconfigurable computing Complete Lab 9 HW4 solutions 
Sample exam 2 
Sample exam 2 solutions 
HW4 Solutions. Last day to Q-Drop is 4/15
14 (04/22,04/24) Transmission Lines Memories TEST 2 on Friday 4/26 from 8pm to 10pm. Location BSBE 115