Patents & Publications

– S. Kalafatis, A. B. Kyker, R. D. Fisch, “Method and System to insert a flow marker into an instruction stream to indicate a thread switching operation within a multithreaded processor” U.S. Patent 6,865,740, Issued Mar. 8, 2005

– S. Kalafatis, A. B. Kyker, R. D. Fisch, “Method and apparatus for thread switching within a multithreaded processor” U.S. Patent 6,535,905, Issued Mar. 18, 2003

– S. Kalafatis, M.D. Cranford, S.D. Rogers, B. Sprunt, “Qualification of event detection by thread ID and thread privilege level” U.S. Patent 7,448,025, Issued Nov. 4, 2008

– S. Kalafatis, A. B. Kyker, R. D. Fisch, “Method and apparatus for thread switching within a multithreaded processor” U.S. Patent 6,981,261, Issued Dec. 27, 2005

– S. Kalafatis, A. B. Kyker, R. D. Fisch, “Method and system to perform a thread switching operation within a multithreaded processor based on detection of a branch instruction”U.S. Patent 6,795,845, Issued Sept. 21, 2004

– R. D. D’Sa, R.E. Hebda, S. Kalafatis, A. B. Kyker, R. B. Chaput, “System and method of maintaining and utilizing multiple return stack buffers”U.S. Patent 6,151,671, Issued Nov. 21, 2000

– S. Kalafatis, “Dual edge adjusting digital phase lock loop having one-half reference clock jitter” U.S. Patent 5,546,434, Issued Aug. 13, 1996

– S. Kalafatis, J. F. O’Hanlon, K.P. Gross, Design and Development of a Rotating Wafer Scanner, Optical Engineering 32{2}, 420-424 (Feb 1993)